For the given digital logic, What is the output X ?
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The gate is NOT of AND. so first AND of 1 and 1 is 1. and NOT of 1 is 0. So answer is 0.
When u apply both inputs high to nand gate that time nmos transistor are in series so both are on state. and pmos transistors are of state. so will get output is logic low(0)
The picture above is a symbol of NAND gate ( Negated AND or NOT AND ), a logic gate which produces an output that is false only if all its inputs are true; thus its output is complement to that of the AND gate. A LOW ( 0 ) output results only if both the inputs to the gate are HIGH ( 1 ) ; if one or both inputs are LOW ( 0 ) , a HIGH ( 1 ) output results.
This is an illustration of the NAND logic gate (combination of NOT and AND gates). The AND gate works on the principle that if both the 2 values A and B passed through the gate signify ON (i.e., 1), then the output of the gate will be 1 and if either one of the values A or B signify OFF (i.e., 0), then the output of the gate will also be 0 .
Here, the NAND gate first applies the AND gate and then the result of the AND gate is passed through the NOT gate to complete the NAND gate. The NOT gate just gives the opposite (negative) output of the value passed through it (i.e., 1 becomes 0 and 0 becomes 1).
First, the AND gate receives the two inputs as 1 , 1 . So, the output when passed through the AND part, we get 1 and when this value is passed through NOT part, it gives the opposite value (i.e., 0 ).
Thus, the final value X after NAND gate completes = 0
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Its a NAND gate where (A * B) inverse = X, apart from all the inputs were one the result will be one , 1 * 1 = 0